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How many packaging forms are there for electronic components? A form to teach you to understand!
Date：2021-10-15 16:16:00 Views：4099
Packaging testing is an important part of the semiconductor industry chain. Packaging refers to the shell used to install semiconductor integrated circuit chips, which plays the role of installation, fixation, sealing, protecting chips and enhancing electrothermal performance. The components not packaged may affect the performance, and it is also convenient for transportation after packaging. Because the quality of packaging technology also directly affects the performance of the chip itself and the design and manufacture of PCB (printed circuit board) connected with it, it is very important. How many packaging forms are there for electronic components? Chuangxin a form to teach you to understand!
First, let's look at the constituent elements of component packaging
For the packaging of a component, three main elements should be paid attention to:
1) Pad - used to fix the device to the circuit board and connect with other devices through wires. We need to draw the shape, position and pad number of the device according to the data manual, and the number corresponds to the pin number of the device;
2) Outline - the outline of component packaging is to tell the designer the area occupied by the device. No more devices can be placed within the outline, otherwise it will lead to conflict;
3) Silk screen marking - we need to mark the key information of the device through silk screen, such as which pin is the starting pin? Device polarity, direction, etc.
In addition to the above three elements, most CAD software adds 3D data. According to these data, the designer can know the 3D shape of the device, which is very important in Mechatronics design.
_20211015161511_479.jpg "电子元件有多少种封装形式？一张表格教你看懂!")
| Main classification description | Secondary classification | Sub classification description |
| Dip is sometimes referred to as "DIL". On this website, they are collectively referred to as "dip", which refers to a through-hole mount package in which pins are led out from both sides of the package. Although the pin spacing is usually 2.54 mm (100 mils), some packages have a pin spacing of 1.778 mm (70 mils). Dip has 6-64 pins, and the package width is usually 15.2mm (600 mils), 10.16mm (400 mils), or 7.62mm (300 mils), but please note that even if the number of pins is the same, the package length will be different. | DIP (dual inline package) | Plastic dip package. Sometimes referred to as "PDIP", but on this website they are collectively referred to as "dip". |
| CDIP (ceramic dip) | Ceramic dip package. Sometimes referred to as "cerdip", but on this website they are collectively referred to as "cdip". | |
| Wdip (window dip) | A dip} package with a transparent window to eliminate ultraviolet rays, usually a ceramic package sealed with glass. The descriptions of different manufacturers may vary, but st (st Microelectronics) calls it "fdip". On this website, they are collectively referred to as "wdip". | |
| Power dip | A dip package type that can dissipate the heat generated by IC through pins. Most of these packages use pins collectively referred to as ground terminals to form a circle around the center. | |
| SIP is sometimes referred to as "SIL", but on this website, they are collectively referred to as "SIP", which refers to a through-hole mount package with pins led out from one side of the package. When attached to a printed circuit board, it is perpendicular to the circuit board. | SIP (single in-line package) | It has 2-23 pins, with a variety of different shapes and pin spacing. Note that many of them have special shapes with heat dissipation structures. In addition, it is not significantly different from to220. |
| ZIP (Z-shaped in-line package) | The pins leading out from one side of the package are bent into a staggered shape in the middle. The pin spacing on one side of the package is 1.27 mm (50 mils), but it becomes 2.54 mm (100 mils) when inserting the printed circuit board. It has 12-40 pins. | |
| QFP is a kind of surface mount package. The pins are led out from the four sides of the package. It is characterized in that the lead is gull wing ("L" shape). It has a variety of pin spacing: 1.0mm, 0.8mm, 0.65mm, 0.5mm, 0.4mm and 0.3mm. Its name is sometimes confused. The disadvantage of QFP package is that the pin spacing is reduced, and the pins are very easy to bend. | QFP (four side pin flatpack) | This description is commonly used in standard QFP packages |
| FQFP (fine spacing {QFP) | The distance between the pointer feet is less than 0.65 mm. Some manufacturers use this name. | |
| HQFP (QFP with radiator) | QFP package with heat sink. | |
| LQFP (thin QFP) | Thin QFP package with thickness of 1.4mm. | |
| MQFP (metric QFP) | A QFP classification in accordance with JEDEC (Joint Electronic Equipment Committee) standards. It is a standard QFP package with pointer foot spacing of 1.0 ~ 0.65mm and body thickness of 3.8 ~ 2.0mm. | |
| MQFP (ultra thin QFP) | An ultra-thin QFP package with a height of 1.27 mm (50 mils) or less is used when mounting on a printed circuit board. The thickness of the package body is about 1.00mm and has a variety of pin spacing: 0.8mm, 0.65mm, 0.5mm and 0.4mm. It has 44 – 120 pins. | |
| VQFP (micro QFP) | A small QFP package with a pin spacing of {0.5mm. The thickness of the package body is about 1.5 mm. It is currently included in the LQFP classification, but some manufacturers still use the name. | |
| J-shaped lead is a kind of surface mount package. It is characterized in that the lead is "J" shaped. Compared with QFP and other packages, the J-lead is not easy to deform and easy to operate. | SOJ (small shape J) Lead package) | The pins are led out from both sides of the package. It is called because the leader is shaped like the letter "J". It is usually made of plastic and is often used in LSI memory, such as DRAM, SRAM, etc. The pin spacing is 1.27 mm (50 mils). It has 20 – 40 pins. |
| PLCC (plastic chip carrier with lead) | The J-shaped pin is a plastic package type led out from the four sides of the package. The pin spacing {is 1.27 mm (50 mils) and has 18-84 pins. This name is also used in qfj # and JEITA standards. | |
| CLCC (ceramic chip carrier with lead) | J-shaped pin is a ceramic package type led from the four sides of the package. The package with window is used for ultraviolet elimination EPROM microcomputer circuit and microcomputer circuit with EPROM. | |
| TSOC | A soj# package with fewer pins. The pin spacing is the same as that of SOJ, which is 1.27 mm (50 mils), but the body size is small. | |
| Grid array leads are arranged in grid shape on one side of the package, which can be divided into two types: through-hole mount PGA type and surface mount BGA type. | PGA (pin grid array) | One of the through-hole mount packages. This is a package type that uses array pins mounted vertically at the bottom of the package (like a nail brush). When the name of the material is not specified, ceramic PGA packaging is often used. For high-speed and large-scale logic LSIs, the pin spacing is} 2.54 mm (100 mils), with 64 – 447 pins. In addition, there is plastic PGA packaging. In order to reduce the cost, it can be used as the packaging substrate instead of glass epoxy printed circuit board. |
| PGA (ball grid array) | A surface mount package in which spherical solder joints are used on the back of a printed circuit board instead of array leads. The LSI} chip is attached to the surface of the printed circuit board and sealed with plastic resin or filling material. It is an LSI package with no less than 200 pins. The size of the package body can be smaller than QFP, and there is no need to worry about lead deformation. Because its lead inductance is less than QFP, it can be used in high-speed LSI packaging. It is currently used in logic LSI (225-350 pins) and high-speed SRAM (119 pins, etc.). | |
| Micro SMD | A small BGA package developed by the National Semiconductor Company of the United States, with 4 – 42 pins. | |
| So stands for small outline. It refers to a surface mount package in which gull wing (L-shaped) leads are led out from both sides of the package. There are various descriptions of these package types. Note that even packages with the same name may have different shapes. | SOP (small package) | In the JEITA} standard, such packages with pin spacing of 1.27 mm (50 mils) are called "SOP" packages. Note that the "SOP" packages referred to in the JEDEC} standard have different widths. |
| SOIC (small form factor integrated circuit) | Sometimes referred to as "so" or "Sol", but on this website, they are collectively referred to as "SOIC". In JEDEC standard, this kind of package with pin spacing of 1.27mm (50 mils) is called "SOIC" package. Please note that the "SOIC" packages referred to in the JEITA} standard have different widths. | |
| MSOP (mini (mini) SOP) | A small package with pin spacing of ＾ 0.65mm or ＾ 0.5mm. Analog devices calls it "microsoic", Maxim calls it "so / Umax", and national semiconductor calls it "miniso". In addition, it can also be considered as SSOP or tssop. | |
| QSOP (1 / 4 size SOP) | A small sop# package with pin spacing of 0.635 mm (25 mils). | |
| SSOP (reduced SOP) | A small, thin sop} package with pin spacing of 1.27 mm (50 mils). SSOP has 5 – 80 pins with pin spacing of 1.0mm, 0.8mm, 0.65mm and 0.5mm. They are widely used as small surface mount packages. | |
| TSOP (SOP) | An ultra-thin small outline package. An SOP package with a mounting height of 1.27 mm (50 mils) or less and a pin spacing of 1.27 mm or less. It has 24 – 64 pins. TSOP is divided into two types: one is that the lead terminal is pasted to the shorter side of the package (pin spacing of 0.6mm, 0.55mm or 0.5mm), and the other is that the lead terminal is pasted to the longer side of the package (pin spacing is usually 1.27mm). In JEITA standard, the former is called "type I" and the latter is called "type II". | |
| TSSOP (ultra thin miniature SOP) | An ultra thin SSOP package with a thickness of 1.0 mm. The pin spacing is 0.65mm or 0.5mm, with 8-56 pins. | |
| HTSSOP (heat sink tssop) | A heat dissipation surface called "heat sink" is provided on the surface of the tssop board mounting end. | |
| CERPAC | A ceramic sealed package with pin spacing of {1.27 mm (50 mils). | |
| DMP | A package developed by new Japan Radio (this website is referred to as "NJR"). The pin spacing is ＾ 1.27 mm (50 mils), which is similar to SOP and ＾ SOIC, but the package width is different. | |
| SC70 | It can also be regarded as a kind of SSOP package, which is a small surface mount package with pin spacing of 0.65 mm. Most have 5} pins, but some have 6 pins. Depending on the manufacturer, it is also called "USV" or "CMPak". | |
| "Sot" stands for "small outline transistor", which was originally a small transistor surface mount package. Even if it has the same shape as Sot, different manufacturers may use different names. | SOT23 | Small surface mount package with pin spacing of 0.95 mm. It has 3 – 6 pins. Depending on the manufacturer, it is also called "sc74a", "mtp5", "mpak" or "SMV". |
| SOT89 | Small surface mount package with pin spacing of 1.5mm and heat sink. Most have 3} pins, but some have 5 pins. Depending on the manufacturer, it is also called "upak". | |
| SOT143 | Small surface mount package with pin spacing of 1.9 mm. It has 4 pins, one of which is wider than the other. | |
| SOT223 | Small surface mount package with pin spacing of 2.3mm and heat sink. It has 3 pins. | |
| "To" stands for "transistor outline". It was originally a transistor package designed to enable leads to be molded and used for surface mount. Even if it has the same shape as to, different manufacturers may use different names. | TO3P | A package used by voltage regulators, etc., originally a transistor package. |
| TO92 | A package for voltage regulators, voltage reference components, etc., originally a transistor package. It can be divided into many different packaging types, such as "mini size" and "long body" packaging. In JEDEC standard, it is also called "to226aa". | |
| TO220 | A package used by voltage regulators, etc., initially a transistor package. It has a tab for mounting to the heat sink. It also includes solid mold packaging, in which the connector is coated with plastic. It is also divided into different types with many pins for amplifiers, etc. "Pentawatt" (5 pins), "heptawatt" (7 pins) and "multiwatt" (multiple pins) of St microelectronics are classified as to220 package, but can also be regarded as a kind of SIP package. | |
| TO252 | A package used by voltage regulators, etc., initially a transistor package. Some manufacturers also refer to the long lead assembly as "sc64". Packages designed to enable leads to be molded and used for surface mount are also called "DPAK", "ppak" or "sc63" by some manufacturers. | |
| TO263 | Similar to the to220 package, but using smaller tabs. It is usually designed to enable the lead to be formed and used for surface mounting. In addition to 3 stitches, there are 5 stitches and 7 stitches. Also known as "D2Pak (ddpak)". | |
| One of the metal shell type packages. No surface mount parts. The lead is inserted into the printed circuit board. It is rarely used at present. | TO3 | An early power transistor package. Secure to the heat sink with two screws. |
| TO5 | A cylindrical metal package with a diameter of 8 mm and a height of 4 mm. Similar to t039. | |
| TO39 | A cylindrical metal package with a diameter of 8 mm and a height of 4 mm. Similar to T05. | |
| TO46 | A cylindrical metal package with a diameter of 5 mm and a height of 2.5 mm. Slightly shorter than to52. | |
| TO52 | A cylindrical metal package with a diameter of 5 mm and a height of 3.5 mm. Slightly higher than TO46. | |
| TO99 | A cylindrical metal package with a diameter of 8 mm and a height of 4 mm. The 8 pins form a circle at the bottom, with a 1mm protrusion in the center to make the bottom higher than the printed circuit board. Its shape is similar to to100. | |
| TO100 | A cylindrical metal package with a diameter of 8 mm and a height of 4 mm. The 10 pins form a circle at the bottom with a 1mm protrusion in the center to make the bottom higher than the printed circuit board. Its shape is similar to to99. |
