What technologies are involved in failure analysis of IC packaging chips?
Date:2021-12-22 14:07:19 Views:1733
With the continuous development of integrated circuit technology, the characteristic size of the chip becomes smaller and smaller, and the structure of the device becomes more and more complex. The corresponding chip process diagnosis, failure analysis and device micromachining become more and more difficult. The traditional analysis methods have been difficult to meet the needs of the development of integrated circuit devices to deep submicron and nano technology.
The principle of opening the cover and cap of components is mainly to remove the package on the surface of components by using chemical or physical methods, and observe the lead connection inside components. In the failure analysis of IC packaging chip, the chip cover is usually opened because the chip surface is coated with colloid. At present, the chip capping treatment is a process of corroding the colloid covered on the outside of the chip with chemicals. Its purpose is to expose the internal chip to the air for visual observation and analysis. What technologies are involved in chip decryption?
1. Probe technology is a technical means to use the probe to connect inside the directly exposed chip, use the method of physical connection, connect to the outside, and use tools such as logic analyzer to collect and analyze data, so as to realize debugging. The bare chip is fixed under the high magnification microscope, and an imported very fine probe (down to the order of less than 1 um) is used to connect the probe anywhere in the chip, and then the internal structure of the chip is analyzed.
2. FIB, the emergence of FIB technology realizes the precise positioning of failure parts in failure analysis of VLSI, which is the basis of failure analysis of VLSI. FIB technology can use ion beam etching under the high-resolution clear image of SEM, and can make the profile in the specific micro area of the device very accurately. Moreover, FIB has no restrictions on the processed sample materials. It can also use SEM to observe the progress in time while etching, so that the processed profile has high positioning accuracy. Because the stress on the sample in the whole process is very small, so, The section has good integrity. FIB must cooperate with other failure analysis tools to complete the analysis, such as scanning electron microscope, transmission electron microscope, energy dispersive spectrometer, light emission microscope, etc.
The above is the related content of "IC packaging chip failure analysis" brought by the core detection. Through this paper, I hope it can be helpful to you. If you like this article, you might as well continue to pay attention to our website, and we will bring more wonderful content later. If you have any needs related to the inspection and testing of electronic products, please call Chuangxin testing, and we will serve you wholeheartedly.