Description:  

The coplanarity test measures the deviation of the terminals (leads or solder balls) of surface-mounted semiconductor devices from coplanarity at room temperature.

Failure mode: Any device with one or more terminals that exceed the specified coplanarity deviation is considered a failure.

Checking the impact of poor coplanarity before the soldering process can prevent potential failure modes resulting from uncorrected joint soldering due to poor coplanarity. Various devices with poor coplanarity can be assembled. Faulty solder joints caused by poor coplanarity on device leads can lead to many potential issues. Firstly, there may be potential failures during board testing. Secondly, the cost of identifying and repairing faults at the board level is at least an order of magnitude more expensive than at the component level. More insidious conditions are the same incorrectly soldered joints passing through unchecked production stages and causing various intermittent failures or failures related to the production line temperature. At this point, the potential problems become the most feared thing for manufacturers who have to replace various non-compliant products, leading to increased costs.

Scope of Application: 

Integrated circuits and semiconductor components, following the commercial and industrial electronic standards and automotive electronics standard according to AEC.

Testing Images:

Non-pin package

Solder ball package

Pin package

Images of Testing Equipment: