Through testing equipment and test vectors written according to the new product specifications, reliability testing can be conducted in terms of sampling, batch testing, and assisting customers in developing tests. Under specific working conditions (typically at room temperature, the normal operating environment for devices), various necessary logic or signal state tests are performed while the device is in its normal working state. This testing is based on the original specifications and industry standards or specifications. Feasibility test vectors or dedicated test circuits are designed to apply corresponding signal source inputs to the test samples. By adjusting and controlling peripheral circuits, signal amplification, or conversion matching under specific conditions, the logic relationship of the signals and changes in the output waveform are analyzed to test the device’s functional characteristics.

Chip verification：

The Importance of Verification

·According to Moore's Law, the number of transistors integrated on a chip will double every 18 months. Although the applicability of Moore's Law is gradually slowing down, functional testing of the large number of transistors on this chip will become increasingly complex, requiring a significant investment of personnel for verification.

·The investment in chips increases layer by layer from market demand to development and then to chip fabrication. If functional errors are not detected before chip fabrication, but bugs are discovered during the fabrication process or in the hands of the user, the factory will spend a lot of manpower and financial resources on fixing the bugs. If it is possible to discover a large number of errors during validation before the chip is produced, it will greatly reduce the pressure of backend error repair and save the factory a lot of resource waste.

·The vulnerability rate of a chip, from design to verification, to backend and finally to chip flow, follows a waveform similar to a parabolic curve with an open downward direction. The vulnerability rate reaches its highest level during design and verification, and the later the vulnerability is discovered, the more difficult it becomes.

·The window for chip launch is gradually shortening, leading to a shorter development cycle requirement. Under the gradually shortened time window, designing chips with complete functions and safety is a challenge for chip validation engineers.

The main tasks of verification personnel

·After the designers implement the design using programming languages, the validators are responsible for building the validation environment and checking the design. Main aspects of inspection:

a. Does the designed module execute as described in the spec.

b. Check for vulnerabilities or boundary issues in the code.

c. Can the designed code handle some error situations stably.

·The task and objectives of chip verification:

a. The tasks are mainly divided into system level, subsystem level, and module level.

b. The goal of verification is to achieve on-time, high-quality, and low consumption.

Verification cycle

·Create a validation plan (based on the interface information, structural information, interaction information, etc. in the functional description document, develop a validation plan, validation tools, validation resources, extract validation points, validation strategies, etc. for a validation module).

·Develop a verification environment (based on the verification plan, develop the required incentive generators, drivers, comparators, etc.).

·Debugging of the environment (checking whether there are any issues with the development validation environment, test sequence, reference model, and hardware design itself).

·Regression testing (checking test cases and updating them to fix vulnerabilities).

·Chip production (to be handed over to the chip manufacturer for production after verification).

·Silicon post system testing (After the chip is returned, the system tester starts testing from the bottom modules according to the integration order of the system. Before testing, the chip needs to be combined with the testing and development board, or implanted into the system to be developed. During the testing process, the silicon pre personnel and silicon post personnel need to maintain contact)

·Escape analysis